High performance computer peripherals use direct memory access (DMA) to efficiently transfer data from a peripheral device to a computer memory. However, when the computer peripheral is a terminal there are special problems involved in the implementation of DMA transfers. Particularly, the amount of data an operator of the terminal desires to transmit typically cannot be accurately predicted by a system processor.
In the prior art, various schemes have been used to implement data transfers using terminals. For instance, a first-in-first-out (FIFO) buffer may be used to receive data from a terminal. The system processor may then periodically poll the FIFO buffer, and process any available data. This scheme, however, requires memory space on the interface between the terminal and the system processor. Also, this polling implementation is somewhat less efficient than DMA transfers.
A second scheme used in the prior art is for the terminal to interrupt the system processor to handle every character. This scheme may be disadvantageous in that a large portion of system processor time can be consumed if each character is individually processed. Interrupting per character can be especially consumptive of processor time when a system processor is servicing several terminals simultaneously.
A third scheme used in the prior art is for a terminal to transfer blocks of characters, which are delimited by special characters (for instance, a carriage return). This scheme, however, may not be used in conjunction with certain operating systems, such as UNIX, which allow application programs to process individual characters from a terminal as they are received.